Interconnects are often formed in integrated circuit fabrication to connect particular elements or components of the integrated circuit and may be used, for example, to create an electrical path within an integrated circuit, such as to apply a voltage to a particular region or component of the integrated circuit. Interconnects may include one or more metal lines or wires and one or more conductive vias. Metal lines may be formed in various structural layers called metalization layers and conductive vias may be formed to connect particular elements formed in various metalization layers. For example, conductive vias are often used to connect metal lines formed in one metalization layer with metal lines formed in other metalization layers.
Metal lines and conductive vias may be formed using standard or damascene processes, such as single and dual damascene processes. In a damascene process, metal lines are deposited in trenches and/or via holes formed in one or more dielectric layers and then excess material is removed, for example, by chemical metal polish (CMP). In a certain dual damascene process used to form a conductive via and a metal line, a via hole is first etched through two dielectric layers, the via hole is plugged with a polymer material, and a trench is then formed through the top one of the two dielectric layers and the polymer material within the top dielectric layer. The via hole and trench are then filled with a conductive material to form a conductive via and a metal line, respectively. To form the trench, a trench etch process is performed, typically using a dielectric chemistry including C4F8 or C5F8 combined with Argon (and/or O2 or N2) at relatively high RF powers (ion energy and flux), such as in the range of 1000–2000 Watts. Such trench etch process may etch through the top dielectric layer faster than through the polymer material within the top dielectric layer. As a result, portions of the top dielectric layer around the perimeter of the polymer plug may not be removed during the trench etch process due to sidewall masking around the polymer plug. Such remaining portions of the top dielectric layer may be referred to as “crowns,” “fences,” or “ridges” of dielectric material. Such crowns, fences or ridges may cause poor metallization when the via hole and trench are filled with the conductive material, which may lead to decreased yield or reliability of the metal contacts.